Parallelizing a Network Simulator

In the context of the current multicore revolution, the need to design an effective interconnect network has become increasingly vital. Computer architects make use of network simulators in order to determine the best network designs and configurations. The process by which this is done however is often computationally intensive and requires significant run time. The fact that most simulators are single threaded only adds to the computational bottleneck and renders them unable to take advantage of the new multicore processors. This paper demonstrates how an interconnect network simulator can be parallelized into a multithreaded implementation. The additional performance gain from this parallel simulator ultimately can lead to decreased development time and better designs as architects can sweep additional parameter spaces and consider a wider range of network configurations.